#ifndef __RK3399_REG_GRF_H__
#define __RK3399_REG_GRF_H__

#define RK3399_GRF_BASE				(0xff770000)

#define GRF_USB3OTG0_CON0			(0x2430)
#define GRF_USB3OTG0_CON1			(0x2434)
#define GRF_USB3OTG1_CON0			(0x2440)
#define GRF_USB3OTG1_CON1			(0x2444)
#define GRF_USB3OTG0_STATUS_LAT0	(0x2450)
#define GRF_USB3OTG0_STATUS_LAT1	(0x2454)
#define GRF_USB3OTG0_STATUS_CB		(0x2458)
#define GRF_USB3OTG1_STATUS_LAT0	(0x2460)
#define GRF_USB3OTG1_STATUS_LAT1	(0x2464)
#define GRF_USB3OTG1_STATUS_CB		(0x2468)

#define GRF_USB20_HOST0_CON0		(0x4100)
#define GRF_USB20_HOST0_CON1		(0x4104)
#define GRF_USB20_HOST1_CON0		(0x4110)
#define GRF_USB20_HOST1_CON1		(0x4114)
#define GRF_HSIC_CON0				(0x4120)
#define GRF_HSIC_CON1				(0x4124)
#define GRF_USBHOST0_STATUS			(0x4140)
#define GRF_USBHOST1_STATUS			(0x4144)
#define GRF_HSIC_STATUS				(0x4148)
#define GRF_HSICPHY_CON0			(0x4470)

#define GRF_USBPHY0_CTRL0			(0x4480)
#define GRF_USBPHY0_CTRL1			(0x4484)
#define GRF_USBPHY0_CTRL2			(0x4488)
#define GRF_USBPHY0_CTRL3			(0x448c)
#define GRF_USBPHY0_CTRL4			(0x4490)
#define GRF_USBPHY0_CTRL5			(0x4494)
#define GRF_USBPHY0_CTRL6			(0x4498)
#define GRF_USBPHY0_CTRL7			(0x449c)
#define GRF_USBPHY0_CTRL8			(0x44a0)
#define GRF_USBPHY0_CTRL9			(0x44a4)
#define GRF_USBPHY0_CTRL10			(0x44a8)
#define GRF_USBPHY0_CTRL11			(0x44ac)
#define GRF_USBPHY0_CTRL12			(0x44b0)
#define GRF_USBPHY0_CTRL13			(0x44b4)
#define GRF_USBPHY0_CTRL14			(0x44b8)
#define GRF_USBPHY0_CTRL15			(0x44bc)
#define GRF_USBPHY0_CTRL16			(0x44c0)
#define GRF_USBPHY0_CTRL17			(0x44c4)
#define GRF_USBPHY0_CTRL18			(0x44c8)
#define GRF_USBPHY0_CTRL19			(0x44cc)
#define GRF_USBPHY0_CTRL20			(0x44d0)
#define GRF_USBPHY0_CTRL21			(0x44d4)
#define GRF_USBPHY0_CTRL22			(0x44d8)
#define GRF_USBPHY0_CTRL23			(0x44dc)
#define GRF_USBPHY0_CTRL24			(0x44e0)
#define GRF_USBPHY0_CTRL25			(0x44e4)

#define GRF_USBPHY1_CTRL0			(0x4500)
#define GRF_USBPHY1_CTRL1			(0x4504)
#define GRF_USBPHY1_CTRL2			(0x4508)
#define GRF_USBPHY1_CTRL3			(0x450c)
#define GRF_USBPHY1_CTRL4			(0x4510)
#define GRF_USBPHY1_CTRL5			(0x4514)
#define GRF_USBPHY1_CTRL6			(0x4518)
#define GRF_USBPHY1_CTRL7			(0x451c)
#define GRF_USBPHY1_CTRL8			(0x4520)
#define GRF_USBPHY1_CTRL9			(0x4524)
#define GRF_USBPHY1_CTRL10			(0x4528)
#define GRF_USBPHY1_CTRL11			(0x452c)
#define GRF_USBPHY1_CTRL12			(0x4530)
#define GRF_USBPHY1_CTRL13			(0x4534)
#define GRF_USBPHY1_CTRL14			(0x4538)
#define GRF_USBPHY1_CTRL15			(0x453c)
#define GRF_USBPHY1_CTRL16			(0x4540)
#define GRF_USBPHY1_CTRL17			(0x4544)
#define GRF_USBPHY1_CTRL18			(0x4548)
#define GRF_USBPHY1_CTRL19			(0x454c)
#define GRF_USBPHY1_CTRL20			(0x4550)
#define GRF_USBPHY1_CTRL21			(0x4554)
#define GRF_USBPHY1_CTRL22			(0x4558)
#define GRF_USBPHY1_CTRL23			(0x455c)
#define GRF_USBPHY1_CTRL24			(0x4560)
#define GRF_USBPHY1_CTRL25			(0x4564)

#define GRF_CPU_CON0				(0xa000)
#define GRF_CPU_CON1				(0xa004)
#define GRF_CPU_CON2				(0xa008)
#define GRF_CPU_CON3				(0xa00c)

#define GRF_CPU_STATUS0				(0xa080)
#define GRF_CPU_STATUS1				(0xa084)
#define GRF_CPU_STATUS2				(0xa088)
#define GRF_CPU_STATUS3				(0xa08c)
#define GRF_CPU_STATUS4				(0xa090)
#define GRF_CPU_STATUS5				(0xa094)

#define GRF_GPIO2A_IOMUX			(0xe000)
#define GRF_GPIO2B_IOMUX			(0xe004)
#define GRF_GPIO2C_IOMUX			(0xe008)
#define GRF_GPIO2D_IOMUX			(0xe00c)
#define GRF_GPIO3A_IOMUX			(0xe010)
#define GRF_GPIO3B_IOMUX			(0xe014)
#define GRF_GPIO3C_IOMUX			(0xe018)
#define GRF_GPIO3D_IOMUX			(0xe01c)
#define GRF_GPIO4A_IOMUX			(0xe020)
#define GRF_GPIO4B_IOMUX			(0xe024)
#define GRF_GPIO4C_IOMUX			(0xe028)
#define GRF_GPIO4D_IOMUX			(0xe02c)

#define GRF_GPIO2A_P				(0xe040)
#define GRF_GPIO2B_P				(0xe044)
#define GRF_GPIO2C_P				(0xe048)
#define GRF_GPIO2D_P				(0xe04c)
#define GRF_GPIO3A_P				(0xe050)
#define GRF_GPIO3B_P				(0xe054)
#define GRF_GPIO3C_P				(0xe058)
#define GRF_GPIO3D_P				(0xe05c)
#define GRF_GPIO4A_P				(0xe060)
#define GRF_GPIO4B_P				(0xe064)
#define GRF_GPIO4C_P				(0xe068)
#define GRF_GPIO4D_P				(0xe06c)

#define GRF_GPIO2A_SR				(0xe080)
#define GRF_GPIO2B_SR				(0xe084)
#define GRF_GPIO2C_SR				(0xe088)
#define GRF_GPIO2D_SR				(0xe08c)
#define GRF_GPIO3D_SR				(0xe09c)
#define GRF_GPIO4A_SR				(0xe0a0)
#define GRF_GPIO4B_SR				(0xe0a4)
#define GRF_GPIO4C_SR				(0xe0a8)
#define GRF_GPIO4D_SR				(0xe0ac)

#define GRF_GPIO2A_SMT				(0xe0c0)
#define GRF_GPIO2B_SMT				(0xe0c4)
#define GRF_GPIO2C_SMT				(0xe0c8)
#define GRF_GPIO2D_SMT				(0xe0cc)
#define GRF_GPIO3A_SMT				(0xe0d0)
#define GRF_GPIO3B_SMT				(0xe0d4)
#define GRF_GPIO3C_SMT				(0xe0d8)
#define GRF_GPIO3D_SMT				(0xe0dc)
#define GRF_GPIO4A_SMT				(0xe0e0)
#define GRF_GPIO4B_SMT				(0xe0e4)
#define GRF_GPIO4C_SMT				(0xe0e8)
#define GRF_GPIO4D_SMT				(0xe0ec)

#define GRF_GPIO2A_E				(0xe100)
#define GRF_GPIO2B_E				(0xe104)
#define GRF_GPIO2C_E				(0xe108)
#define GRF_GPIO2D_E				(0xe10c)
#define GRF_GPIO3A_E01				(0xe110)
#define GRF_GPIO3A_E2				(0xe114)
#define GRF_GPIO3B_E01				(0xe118)
#define GRF_GPIO3B_E2				(0xe11c)
#define GRF_GPIO3C_E01				(0xe120)
#define GRF_GPIO3C_E2				(0xe124)
#define GRF_GPIO3D_E				(0xe128)
#define GRF_GPIO4A_E				(0xe12c)
#define GRF_GPIO4B_E01				(0xe130)
#define GRF_GPIO4B_E2				(0xe134)
#define GRF_GPIO4C_E				(0xe138)
#define GRF_GPIO4D_E				(0xe13c)

#define GRF_GPIO2C_HE				(0xe188)
#define GRF_GPIO2D_HE				(0xe18c)

#define GRF_SOC_CON0				(0xe200)
#define GRF_SOC_CON1				(0xe204)
#define GRF_SOC_CON2				(0xe208)
#define GRF_SOC_CON3				(0xe20c)
#define GRF_SOC_CON4				(0xe210)
#define GRF_SOC_CON5_PCIE			(0xe214)
#define GRF_SOC_CON5				(0xc214)
#define GRF_SOC_CON6				(0xc218)
#define GRF_SOC_CON7				(0xe21c)
#define GRF_SOC_CON8				(0xe220)
#define GRF_SOC_CON9_PCIE			(0xe224)
#define GRF_SOC_CON9				(0x6224)
#define GRF_SOC_CON20				(0x6250)
#define GRF_SOC_CON21				(0x6254)
#define GRF_SOC_CON22				(0x6258)
#define GRF_SOC_CON23				(0x625c)
#define GRF_SOC_CON24				(0x6260)
#define GRF_SOC_CON25				(0x6264)
#define GRF_SOC_CON26				(0x6268)

#define GRF_SOC_STATUS0				(0xe2a0)
#define GRF_SOC_STATUS1				(0xe2a4)
#define GRF_SOC_STATUS2				(0xe2a8)
#define GRF_SOC_STATUS3				(0xe2ac)
#define GRF_SOC_STATUS4				(0xe2b0)
#define GRF_SOC_STATUS5				(0xe2b4)

#define GRF_DDRC0_CON0				(0xe380)
#define GRF_DDRC0_CON1				(0xe384)
#define GRF_DDRC1_CON0				(0xe388)
#define GRF_DDRC1_CON1				(0xe38c)

#define GRF_SIG_DETECT_CON0			(0xe3c0)
#define GRF_SIG_DETECT_CON1			(0xe3c8)
#define GRF_SIG_DETECT_CLR			(0xe3d0)
#define GRF_SIG_DETECT_STATUS		(0xe3e0)

#define GRF_USB20PHY0_CON(i)		(0xe450 + ((i) * 4))
#define GRF_USB20PHY1_CON(i)		(0xe460 + ((i) * 4))

#define GRF_USB3PHY0_CON(i)			(0xe580 + ((i) * 4))
#define GRF_USB3PHY1_CON(i)			(0xe58c + ((i) * 4))
#define GRF_USB3PHY_STATUS(i)		(0xe5c0 + ((i) * 4))

#define GRF_DLL_CON0				(0xe600)
#define GRF_DLL_CON1				(0xe604)
#define GRF_DLL_CON2				(0xe608)
#define GRF_DLL_CON3				(0xe60c)
#define GRF_DLL_CON4				(0xe610)
#define GRF_DLL_CON5				(0xe614)

#define GRF_DLL_STATUS0				(0xe620)
#define GRF_DLL_STATUS1				(0xe624)
#define GRF_DLL_STATUS2				(0xe628)
#define GRF_DLL_STATUS3				(0xe62c)
#define GRF_DLL_STATUS4				(0xe630)

#define GRF_IO_VSEL					(0xe640)
#define GRF_SARADC_TESTBIT			(0xe644)
#define GRF_SARADC_TESTBIT_H		(0xe648)
#define GRF_SARADC_TESTBIT_L		(0xe64c)
#define GRF_CHIP_ID_ADDR			(0xe800)
#define GRF_FAST_BOOT_ADDR			(0xe880)

#define GRF_EMMCCORE_CON(i)			(0xf000 + ((i) * 4))
#define GRF_EMMCCORE_STATUS(i)		(0xf040 + ((i) * 4))
#define GRF_EMMCPHY_CON(i)			(0xf780 + ((i) * 4))
#define GRF_EMMCPHY_STATUS			(0xf7a0)

#endif /* __RK3399_REG_GRF_H__ */
